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ENTCS
2006
176views more  ENTCS 2006»
14 years 9 months ago
Automatic Formal Synthesis of Hardware from Higher Order Logic
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...
ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
15 years 1 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
DAC
1994
ACM
15 years 1 months ago
Statistical Delay Modeling in Logic Design and Synthesis
Manufacturing disturbances are inevitable in the fabrication of integrated circuits. These disturbances will result in variations in the delay speci cations of manufactured circui...
Horng-Fei Jyu, Sharad Malik
FOSSACS
2008
Springer
14 years 11 months ago
Coalgebraic Logic and Synthesis of Mealy Machines
Abstract. We present a novel coalgebraic logic for deterministic Mealy machines that is sound, complete and expressive w.r.t. bisimulation. Every finite Mealy machine corresponds t...
Marcello M. Bonsangue, Jan J. M. M. Rutten, Alexan...
ERSA
2006
76views Hardware» more  ERSA 2006»
14 years 11 months ago
Logic Synthesis and Place-and-Route Environment for ORGAs
Abstract-- We have continued development of Optically Reconfigurable Gate Arrays (ORGAs) to realize larger virtual gate count VLSIs than currently available VLSIs. The grain and st...
Minoru Watanabe, Fuminori Kobayashi