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» Synthesis of Reversible Logic
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TVLSI
2010
15 years 3 days ago
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization
Hardware debuggers and logic analyzers must be able to record a continuous trace of data. Since the trace data are tremendous, to save space, these traces are often compressed. The...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
GLVLSI
2007
IEEE
139views VLSI» more  GLVLSI 2007»
15 years 11 months ago
Synthesis of irregular combinational functions with large don't care sets
A special logic synthesis problem is considered for Boolean functions which have large don’t care sets and are irregular. Here, a function is considered as irregular if the inpu...
Valentin Gherman, Hans-Joachim Wunderlich, R. D. M...
148
Voted
MCU
1998
154views Hardware» more  MCU 1998»
15 years 6 months ago
A computation-universal two-dimensional 8-state triangular reversible cellular automaton
A reversible cellular automaton (RCA) is a cellular automaton (CA) whose global function is injective and every configuration has at most one predecessor. Margolus showed that the...
Katsunobu Imai, Kenichi Morita
COLING
1996
15 years 6 months ago
Reversible delayed lexical choice in a bidirectional framework
We describe a bidirectional framework for natural language parsing and generation, using a typedfeatureformalismand an HPSG-based grammar with a parser and generator derived from ...
Graham Wilcock, Yuji Matsumoto