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CODES
2005
IEEE
15 years 3 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
15 years 3 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
KBSE
2003
IEEE
15 years 3 months ago
Specification and Synthesis of Hybrid Automata for Physics-Based Animation
Physics-based animation programs can often be modeled in terms of hybrid automata. A hybrid automaton includes both discrete and continuous dynamical variables. The discrete varia...
Thomas Ellman
SIGGRAPH
1993
ACM
15 years 1 months ago
View interpolation for image synthesis
Image-space simplifications have been used to accelerate the calculation of computer graphic images since the dawn of visual simulation. Texture mapping has been used to provide a...
Shenchang Eric Chen, Lance Williams
ASPDAC
1995
ACM
103views Hardware» more  ASPDAC 1995»
15 years 1 months ago
A scheduling algorithm for multiport memory minimization in datapath synthesis
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
Hae-Dong Lee, Sun-Young Hwang