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» Synthesis of Self-Testable Controllers
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98
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TACO
2008
130views more  TACO 2008»
15 years 1 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
99
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TCAD
2008
102views more  TCAD 2008»
15 years 1 months ago
Quantum Circuit Simplification and Level Compaction
Abstract--Quantum circuits are time-dependent diagrams describing the process of quantum computation. Usually, a quantum algorithm must be mapped into a quantum circuit. Optimal sy...
Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller...
CODES
2007
IEEE
15 years 8 months ago
A low power VLIW processor generation method by means of extracting non-redundant activation conditions
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuc...
OZCHI
2006
ACM
15 years 7 months ago
Beyond security: implications for the future of federated digital identity management systems
Federated identity management is often viewed by corporations as a solution to support secure online commerce by synthesising complex and fragmented user information into a single...
Christine Satchell, Graeme G. Shanks, Steve Howard...
HYBRID
2004
Springer
15 years 7 months ago
Modeling Subtilin Production in Bacillus subtilis Using Stochastic Hybrid Systems
The genetic network regulating the biosynthesis of subtilin in Bacillus subtilis is modeled as a stochastic hybrid system. The continuous state of the hybrid system is the concentr...
Jianghai Hu, Wei Chung Wu, Shankar Sastry