663 search results - page 71 / 133 » Synthesis of Self-Testable Controllers |
112
Voted
ASYNC
2003
IEEE
15 years 8 months ago
2003
IEEE
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
83
Voted
ISCAS
1999
IEEE
15 years 7 months ago
1999
IEEE
This paper presents the design consideration of high order digital AZ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (M...
165
Voted
ICCVW
1999
Springer
15 years 7 months ago
1999
Springer
This paper is a survey of the theory and methods of photogrammetric bundle adjustment, aimed at potential implementors in the computer vision community. Bundle adjustment is the p...
130
Voted
EUROMICRO
1998
IEEE
15 years 7 months ago
1998
IEEE
The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have develop...
128
Voted
ISSS
1998
IEEE
15 years 7 months ago
1998
IEEE
In this paper, we propose the target board architecture of a rapid prototyping embedded system based on hardware software codesign. The target board contains a TMS320C30 DSP proce...