87 search results - page 5 / 18 » Synthesis of Testable RTL Designs |
DAC
1994
ACM
15 years 1 months ago
1994
ACM
This paper introduces hot potato high level synthesis transformation techniques. These techniques add deflection operations in a computation in such a way that a specific goal is ...
RSP
2005
IEEE
15 years 3 months ago
2005
IEEE
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
ARITH
2009
IEEE
15 years 4 months ago
2009
IEEE
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
DAC
1999
ACM
15 years 1 months ago
1999
ACM
In this paper, we present a new method to the built-in selftestable data path synthesis based on integer linear programming (ILP). Our method performs system register assignment, ...
ICCAD
2007
IEEE
2007
IEEE
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors
15 years 1 months ago
Abstract: Polynomial computations over fixed-size bitvectors are found in many practical datapath designs. For efficient RTL synthesis, it is important to identify good decompositi...