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» Synthesis of quantum logic circuits
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TCAD
2008
81views more  TCAD 2008»
14 years 9 months ago
Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...
Stephen Plaza, Igor L. Markov, Valeria Bertacco
ICCAD
1997
IEEE
171views Hardware» more  ICCAD 1997»
15 years 1 months ago
The disjunctive decomposition of logic functions
In this paper we present an algorithm for converting a BDD representation of a logic function into a multiple-level netlist of disjoint-support subfunctions. On the theoretical si...
Valeria Bertacco, Maurizio Damiani
GLVLSI
2007
IEEE
187views VLSI» more  GLVLSI 2007»
15 years 3 months ago
DAG based library-free technology mapping
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...
ISQED
2003
IEEE
85views Hardware» more  ISQED 2003»
15 years 2 months ago
PDL: A New Physical Synthesis Methodology
In this paper, we propose a new physical synthesis methodology, PDL, which relaxes the timing constraints to obtain best optimality in terms of layout quality and timing quality. ...
Toshiyuki Shibuya, Rajeev Murgai, Tadashi Konno, K...
EH
2000
IEEE
156views Hardware» more  EH 2000»
15 years 1 months ago
Evolution of Analog Circuits on Field Programmable Transistor Arrays
Evolvable Hardware (EHW) refers to HW design and selfreconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing ...
Adrian Stoica, Didier Keymeulen, Ricardo Salem Zeb...