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» Synthesis of system verilog assertions
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SIGSOFT
2006
ACM
14 years 7 months ago
Scenarios, goals, and state machines: a win-win partnership for model synthesis
Models are increasingly recognized as an effective means for elaborating requirements and exploring designs. For complex systems, model building is far from an easy task. Efforts ...
Christophe Damas, Bernard Lambeau, Axel van Lamswe...
JOT
2010
114views more  JOT 2010»
13 years 4 months ago
Semantic Annotation for Java
This paper describes how to use annotation to provide semantic information. The applications include the automatic construction of a GUI so that the user input is constrained to a...
Douglas Lyon
SAMOS
2007
Springer
14 years 11 days ago
An Evolutionary Approach to Area-Time Optimization of FPGA designs
—This paper presents a new methodology based on evolutionary multi-objective optimization (EMO) to synthesize multiple complex modules on programmable devices (FPGAs). It starts ...
Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Paler...
AADEBUG
2005
Springer
13 years 11 months ago
An integrated debugging environment for reprogrammble hardware systems
Reprogrammable hardware systems are traditionally very difficult to debug due to their high level of parallelism. In our solution to this problem, features are inserted into the u...
Kevin Camera, Hayden Kwok-Hay So, Robert W. Broder...
FCCM
1997
IEEE
199views VLSI» more  FCCM 1997»
13 years 10 months ago
The RAW benchmark suite: computation structures for general purpose computing
The RAW benchmark suite consists of twelve programs designed to facilitate comparing, validating, and improving reconfigurable computing systems. These benchmarks run the gamut o...
Jonathan Babb, Matthew Frank, Victor Lee, Elliot W...