85 search results - page 11 / 17 » Synthesizable High Level Hardware Descriptions |
ACSAC
2003
IEEE
15 years 2 months ago
2003
IEEE
1 DOD Joint Vision 2020 (JV2020) is the integrated multi-service planning document for conduct among coalition forces of future warfare. It requires the confluence of a number of k...
70
Voted
DATE
2002
IEEE
15 years 2 months ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
ISSS
1995
IEEE
15 years 1 months ago
1995
IEEE
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
ITC
1998
IEEE
15 years 1 months ago
1998
IEEE
This paper explores defects found in a high volume microprocessor when shipping at a low defect level. A brief description of the manufacturing flow along with definition of DPM i...
90
Voted
ACSD
2001
IEEE
15 years 1 months ago
2001
IEEE
Synchronous languages allow a high level, concurrent, and deterministic description the behavior of reactive systems. Thus, they can be used advantageously for the programming of ...