85 search results - page 13 / 17 » Synthesizable High Level Hardware Descriptions |
117
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DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
We present a methodology, an environment and supporting tools to map an application on a wireless sensor network (WSN). While the method is quite general, we use extensively an exa...
112
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DAC
2006
ACM
15 years 7 months ago
2006
ACM
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
140
Voted
DAC
2003
ACM
16 years 2 months ago
2003
ACM
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
142
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DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
115
Voted
ISCAS
2006
IEEE
15 years 7 months ago
2006
IEEE
JPEG2000 is the latest international standard for image compression. It combines state of the art image compression performance with a rich feature set. JPEG2000 codestreams are h...