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DAC
2012
ACM
13 years 6 months ago
Equivalence checking for behaviorally synthesized pipelines
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
Kecheng Hao, Sandip Ray, Fei Xie
ICPR
2006
IEEE
16 years 5 months ago
Synthesizing Reflections of Inserted Objects
The aim of reflection synthesis of inserted objects is to generate reflections which would be seen by the same camera capturing the target scene and be reflected by the true refle...
Hassan Foroosh, Xiaochun Cao
ISCAS
2003
IEEE
89views Hardware» more  ISCAS 2003»
15 years 9 months ago
Synthesizing checkers for on-line verification of System-on-Chip designs
In modern System-on-Chip (SoC) designs verification becomes the major bottleneck. Since by using state-of-theart techniques complete designs cannot be fully formally verified, it ...
Rolf Drechsler
ACCV
1998
Springer
15 years 8 months ago
VR Models from Epipolar Images: An Approach to Minimize Errors in Synthesized Images
A new paradigm, the minimization of errors in synthesized images, is introduced to organically combine Computer Vision and Computer Graphics for Virtual Reality applications. Based...
Mikio Shinya, Takafumi Saito, Takeaki Mori, Noriyo...
ECAL
2007
Springer
15 years 8 months ago
Synthesizing Physically-Realistic Environmental Models from Robot Exploration
Abstract. In previous work [4] a framework was demonstrated that allows an autonomous robot to automatically synthesize physically-realistic models of its own body. Here it is demo...
Josh C. Bongard