175 search results - page 3 / 35 » Synthetic circuit generation using clustering and iteration |
95
Voted
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
102
Voted
APBC
2004
14 years 11 months ago
2004
Huge amount of gene expression data have been generated as a result of the human genomic project. Clustering has been used extensively in mining these gene expression data to find...
TSMC
2010
14 years 4 months ago
2010
Abstract--It is critical to use automated generators for synthetic models and data, given the sparsity of benchmark models for empirical analysis and the cost of generating models ...
DATE
2000
IEEE
15 years 1 months ago
2000
IEEE
This paper presents a methodology towards synthesis of high performance analog circuits. Layout parasitics are estimated and compensated during circuit sizing. Physical layout con...
ITC
2003
IEEE
15 years 2 months ago
2003
IEEE
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...