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136
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DAC
2005
ACM
16 years 5 months ago
Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs
We propose two novel integration techniques -- bypass and bookkeeping -- in the memory controller to address the cache coherence compatibility issue of a non-shared bus heterogene...
Taeweon Suh, Daehyun Kim, Hsien-Hsin S. Lee
EUROMICRO
2002
IEEE
15 years 9 months ago
Towards an Impact Analysis for Component Based Real-Time Product Line Architectures
In this paper we propose a method for predicting the consequences of adding new components to an existing product line in the real-time systems domain. We refer to such a predicti...
Anders Wall, Magnus Larsson, Christer Norströ...
ECRTS
2000
IEEE
15 years 9 months ago
Towards validated real-time software
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
Valérie Bertin, Michel Poize, Jacques Pulou...
139
Voted
FM
2008
Springer
130views Formal Methods» more  FM 2008»
15 years 6 months ago
Specification and Checking of Software Contracts for Conditional Information Flow
Abstract. Information assurance applications built according to the MILS (Multiple Independent Levels of Security) architecture often contain information flow policies that are con...
Torben Amtoft, John Hatcliff, Edwin Rodrígu...
SERP
2004
15 years 6 months ago
COTS-Aware Requirements Engineering and Software Architecting
At the heart of a well-disciplined, systematic methodology that explicitly supports the use of COTS components is a clearly defined process for effectively using components that m...
Lawrence Chung, Kendra Cooper