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PPOPP
2010
ACM
16 years 23 days ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
GLVLSI
2007
IEEE
211views VLSI» more  GLVLSI 2007»
16 years 18 days ago
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
Salvatore Carta, Andrea Acquaviva, Pablo Garcia De...
CODES
2005
IEEE
15 years 12 months ago
Key research problems in NoC design: a holistic perspective
Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex on-chip communication problems. The lack of an unified representation of applications and ar...
Ümit Y. Ogras, Jingcao Hu, Radu Marculescu
APSEC
2003
IEEE
15 years 11 months ago
JINI/J2EE Bridge for Large-scale IP Phone Services
Current IP phone architectures which bring phone services to a distributed open environment are eraltively static and do not scale well. An IP phone environment should be more dyn...
Jia Yu, Jan Newmarch, Michael Geisler
SAC
2008
ACM
15 years 5 months ago
PPEPR: plug and play electronic patient records
The integration of Electronic Patient Record (EPR) systems is at the centre of many of the new regional and national initiatives to integrate clinical processes across department,...
Ratnesh Sahay, Waseem Akhtar, Ronan Fox