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» System Design Validation Using Formal Models
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OTM
2007
Springer
15 years 8 months ago
Understanding the Occurrence of Errors in Process Models Based on Metrics
Abstract. Business process models play an important role for the management, design, and improvement of process organizations and processaware information systems. Despite the exte...
Jan Mendling, Gustaf Neumann, Wil M. P. van der Aa...
ICSE
2008
IEEE-ACM
16 years 3 months ago
Formal verification of an automotive scenario in service-oriented computing
We report on the successful application of academic experience with formal modelling and verification techniques to an automotive scenario from the service-oriented computing doma...
Maurice H. ter Beek, Stefania Gnesi, Nora Koch, Fr...
126
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ICFEM
2003
Springer
15 years 7 months ago
Formal Proof of a Polychronous Protocol for Loosely Time-Triggered Architectures
The verification of safety critical systems has become an area of increasing importance in computer science. The notion of reactive system has emerged to concentrate on problems r...
Mickaël Kerboeuf, David Nowak, Jean-Pierre Ta...
SEC
1997
15 years 3 months ago
A formal model to aid documenting and harmonizing of information security requirements
A formal top down model shall be presented to aid documentation and harmonization of information security requirements. The model formalizes layered development of inn security, w...
Jussipekka Leiwo, Yuliang Zheng
FDL
2005
IEEE
15 years 8 months ago
Implementation of a SystemC based Environment
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
Richard Hoffer, Frank Baszynski