10159 search results - page 208 / 2032 » System Design Validation Using Formal Models |
121
Voted
FM
2003
Springer
15 years 8 months ago
2003
Springer
Software systems are often model checked by translating them into a directly model-checkable formalism. Any serious software system requires application of compositional reasoning ...
138
Voted
ACL
1989
15 years 4 months ago
1989
We propose a model for transfer in machine translation which uses a rewriting system for typed feature structures. The grammar definitions describe transfer relations which are ap...
123
Voted
CODES
2001
IEEE
15 years 6 months ago
2001
IEEE
This paper addresses the problem of estimating cost and development effort of a system, starting from its complete or partial high-level description. In addition, some modificatio...
137
Voted
INFORMATICALT
1998
15 years 2 months ago
1998
This paper describes a method how to represent and build a reusable VHDL component. By that component we can, for example, describe a family of the relative VHDL models. To represe...
108
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CHI
2007
ACM
16 years 3 months ago
2007
ACM
Traditionally, software engineering processes are based on a formalist model that emphasizes strict documentation, procedural and validation standards. Although this is a poor fit...