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» System Design Validation Using Formal Models
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GECCO
2005
Springer
149views Optimization» more  GECCO 2005»
15 years 9 months ago
There's more to a model than code: understanding and formalizing in silico modeling experience
Mapping biology into computation has both a domain specific aspect – biological theory – and a methodological aspect – model development. Computational modelers have implici...
Janet Wiles, Nicholas Geard, James Watson, Kai Wil...
WAPCV
2007
Springer
15 years 10 months ago
Simulation and Formal Analysis of Visual Attention in Cognitive Systems
In this paper a simulation model for visual attention is discussed and formally analysed. The model is part of the design of a cognitive system which comprises an agent that suppor...
Tibor Bosse, Peter-Paul van Maanen, Jan Treur
ISORC
1999
IEEE
15 years 8 months ago
Applying Use Cases for the Requirements Validation of Component-Based Real-Time Software
Component-based software development is a promising way to improve quality, time to market and handle the increasing complexity of software for real-time systems. In this paper th...
Wolfgang Fleisch
FAC
2008
97views more  FAC 2008»
15 years 4 months ago
A functional formalization of on chip communications
This paper presents a formal model and a systematic approach to the validation of communication tures at a high level of abstraction. This model is described mathematically by a fu...
Julien Schmaltz, Dominique Borrione
161
Voted
FDL
2004
IEEE
15 years 7 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng