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» System Design Validation Using Formal Models
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DSN
2002
IEEE
15 years 8 months ago
Model Checking Safety Properties of Servo-Loop Control Systems
This paper presents the experiences of using a symbolic model checker to check the safety properties of a servoloop control system. Symbolic model checking has been shown to be be...
M. Edwin Johnson
SIGSOFT
1998
ACM
15 years 8 months ago
Reasoning about Implicit Invocation
Implicit invocation SN92, GN91] has become an important architectural style for large-scale system design and evolution. This paper addresses the lack of speci cation and veri cat...
David Garlan, Somesh Jha, David Notkin
GLVLSI
2003
IEEE
145views VLSI» more  GLVLSI 2003»
15 years 9 months ago
Using dynamic domino circuits in self-timed systems
We introduce a simple hierarchical design technique for using dynamic domino circuits to build high-performance self-timed data path circuits. We wrap the dynamic domino circuit i...
Jung-Lin Yang, Erik Brunvand
CAISE
2006
Springer
15 years 7 months ago
Designing Security Requirements Models Through Planning
The quest for designing secure and trusted software has led to refined Software Engineering methodologies that rely on tools to support the design process. Automated reasoning mech...
Volha Bryl, Fabio Massacci, John Mylopoulos, Nicol...
JIRS
2007
229views more  JIRS 2007»
15 years 3 months ago
Unmanned Vehicle Controller Design, Evaluation and Implementation: From MATLAB to Printed Circuit Board
A detailed step-by-step approach is presented to optimize, standardize, and automate the process of unmanned vehicle controller design, evaluation, validation and verification, fol...
Daniel Ernst, Kimon P. Valavanis, Richard Garcia, ...