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» System Design Validation Using Formal Models
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FMCAD
2009
Springer
15 years 10 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
WSC
1998
15 years 5 months ago
Multimodels and Dynamic Structure Models: An Integration of DSDE/DEVS and OOPM
Constructing models of systems that change their structure over time has proved to be a challenging problem, with several proposed solutions. We present two of these approaches an...
Fernando J. Barros, Bernard P. Zeigler, Paul A. Fi...
EMSOFT
2006
Springer
15 years 8 months ago
Analysis of the zeroconf protocol using UPPAAL
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...
Biniam Gebremichael, Frits W. Vaandrager, Miaomiao...
ICRA
2005
IEEE
105views Robotics» more  ICRA 2005»
15 years 9 months ago
Vision-Based Control of a Gough-Stewart Parallel Mechanism using Legs Observation
Abstract— This paper presents a novel approach for visionbased control of the end-effector of parallel mechanisms. It is based on the metrological redundancy paradigm, which simp...
Nicolas Andreff, Arnaud Marchadier, Philippe Marti...
IPPS
2010
IEEE
15 years 2 months ago
Hypergraph-based task-bundle scheduling towards efficiency and fairness in heterogeneous distributed systems
This paper investigates scheduling loosely coupled task-bundles in highly heterogeneous distributed systems. Two allocation quality metrics are used in pay-per-service distributed ...
Han Zhao, Xinxin Liu, Xiaolin Li