10159 search results - page 427 / 2032 » System Design Validation Using Formal Models |
121
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COLING
2002
15 years 4 months ago
2002
A standard architecture for an NLG system has been defined in (Reiter and Dale, 2000). Their work describes the modularization of an NLG system and the tasks of each module. Howev...
127
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ECEASST
2008
15 years 4 months ago
2008
Executable UML allows precisely describing the software system at level of abstraction. The executable models can be translated to a less programming language completely or execute...
119
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FOAL
2009
ACM
15 years 11 months ago
2009
ACM
Programs of a software product line can be synthesized by composing features which implement some unit of program functionality. In most product lines, only some combination of fe...
128
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VRML
2009
ACM
15 years 11 months ago
2009
ACM
This work discusses a model and an architecture for interactive stories to be displayed on the net, designed for being independent from the specific story represented and suitabl...
122
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GLVLSI
2009
IEEE
15 years 11 months ago
2009
IEEE
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...