10159 search results - page 473 / 2032 » System Design Validation Using Formal Models |
142
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ACTA
2007
15 years 5 months ago
2007
We provide a novel model to formalize a well-known algorithm, by Chandra and Toueg, that solves Consensus among asynchronous distributed processes in the presence of a particular ...
226
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ICDE
2007
IEEE
16 years 6 months ago
2007
IEEE
Database performance can be greatly affected by environmental and internal dynamics such as workloads and system configurations. Existing strategies to maintain performance under ...
168
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CAV
2010
Springer
15 years 5 months ago
2010
Springer
ABC is a public-domain system for logic synthesis and formal verification of binary logic circuits appearing in synchronous hardware designs. ABC combines scalable logic transforma...
185
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EMSOFT
2001
Springer
15 years 9 months ago
2001
Springer
ltiple Levels of Abstractions in Embedded Software Design Jerry R. Burch1, Roberto Passerone1, and Alberto L. Sangiovanni-Vincentelli2 1 Cadence Berkeley Laboratories, Berkeley CA ...
128
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ICRA
2010
IEEE
15 years 3 months ago
2010
IEEE
— For many applications, the control of a complex nonlinear system can be made easier by modeling the system as a collection of simplified hybrid modes, each representing a part...