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163
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FCCM
2004
IEEE
144views VLSI» more  FCCM 2004»
15 years 9 months ago
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
In this paper we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We...
Matthias Dyer, Marco Platzner, Lothar Thiele
DAC
2006
ACM
16 years 7 months ago
Games are up for DVFS
Graphics-intensive computer games are no longer restricted to highperformance desktops, but are also available on a variety of portable devices ranging from notebooks to PDAs and ...
Yan Gu, Samarjit Chakraborty, Wei Tsang Ooi
ASPLOS
2004
ACM
15 years 11 months ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
CHI
1997
ACM
15 years 10 months ago
Queries? Links? Is there a Difference?
Hypertext interfaces are considered appropriate for information exploration tasks. The prohibitively expensive link creation effort, however, prevents traditional hypertext interf...
Gene Golovchinsky
151
Voted
CODES
2008
IEEE
16 years 16 days ago
SPaC: a symbolic pareto calculator
The compositional computation of Pareto points in multi-dimensional optimization problems is an important means to efficiently explore the optimization space. This paper presents ...
Hamid Shojaei, Twan Basten, Marc Geilen, Phillip S...