Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
This paper is motivated by two observations: (1) cellular network operators are actively exploring advertisement delivery as a new means of revenue generation, and (2) cellular ba...
Ravi Kokku, Rajesh Mahindra, Sampath Rangarajan, H...
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...
Gareth W. Morris, George A. Constantinides, Peter ...
This paper introduces and presents a solution to the “Escherization” problem: given a closed figure in the plane, find a new closed figure that is similar to the original a...