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» System Level Design Using C
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SIES
2010
IEEE
14 years 9 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
DAC
2004
ACM
16 years 20 days ago
Heterogeneous MP-SoC: the solution to energy-efficient signal processing
To meet conflicting flexibility, performance and cost constraints of demanding signal processing applications, future designs in this domain will contain an increasing number of a...
Tim Kogel, Heinrich Meyr
NSDI
2008
15 years 2 months ago
cSamp: A System for Network-Wide Flow Monitoring
Critical network management applications increasingly demand fine-grained flow level measurements. However, current flow monitoring solutions are inadequate for many of these appl...
Vyas Sekar, Michael K. Reiter, Walter Willinger, H...
DAC
2006
ACM
16 years 20 days ago
Programming models and HW-SW interfaces abstraction for multi-processor SoC
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
Ahmed Amine Jerraya, Aimen Bouchhima, Fréd&...
ASPDAC
2006
ACM
131views Hardware» more  ASPDAC 2006»
15 years 5 months ago
POSIX modeling in SystemC
- Early estimation of the execution time of Real-Time embedded SW is an essential task in complex, HW/SW embedded system design. Application SW execution time estimation requires t...
Hector Posadas, Jesús Ádamez, Pablo ...