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DATE
2009
IEEE
189views Hardware» more  DATE 2009»
16 years 1 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
AOSE
2001
Springer
15 years 11 months ago
Expectation-Oriented Analysis and Design
A key challenge for agent-oriented software engineering is to develop and implement open systems composed of interacting autonomous agents. On the one hand, there is a need for pe...
Wilfried Brauer, Matthias Nickles, Michael Rovatso...
CODES
2004
IEEE
15 years 10 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
196
Voted
ISSS
2000
IEEE
91views Hardware» more  ISSS 2000»
15 years 10 months ago
Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
Tony Givargis, Frank Vahid, Jörg Henkel
DAC
2008
ACM
16 years 7 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...