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DATE
2007
IEEE
123views Hardware» more  DATE 2007»
15 years 8 months ago
Clock domain crossing fault model and coverage metric for validation of SoC design
Multiple asynchronous clock domains have been increasingly employed in System-on-Chip (SoC) designs for different I/O interfaces. Functional validation is one of the most expensiv...
Yi Feng 0002, Zheng Zhou, Dong Tong, Xu Cheng
CODES
2001
IEEE
15 years 5 months ago
System canvas: a new design environment for embedded DSP and telecommunication systems
We present a new design environment, called System Canvas, targeted at DSP and telecommunication system designs. Our environment uses an easy-to-use block-diagram syntax to specif...
Praveen K. Murthy, Etan G. Cohen, Steve Rowland
TACAS
2007
Springer
103views Algorithms» more  TACAS 2007»
15 years 8 months ago
A Reachability Predicate for Analyzing Low-Level Software
Reasoning about heap-allocated data structures such as linked lists and arrays is challenging. The reachability predicate has proved to be useful for reasoning about the heap in ty...
Shaunak Chatterjee, Shuvendu K. Lahiri, Shaz Qadee...
DAC
2004
ACM
16 years 2 months ago
System design for DSP applications in transaction level modeling paradigm
In this paper, we systematically define three transaction level TLMs), which reside at different levels of abstraction between the functional and the implementation model of a DSP...
Abhijit K. Deb, Axel Jantsch, Johnny Öberg
ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
15 years 6 months ago
Instruction level power model of microcontrollers
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...
C. Chakrabarti, D. Gaitonde