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SAC
2010
ACM
15 years 2 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
DATE
2007
IEEE
143views Hardware» more  DATE 2007»
15 years 8 months ago
Portable multimedia SoC design: a global challenge
- The intrinsic capability brought by each new technology node opens the way to a broad range of system integration options and continuously enables new applications to be integrat...
Maurizio Paganini, Georg Kimmich, Stephane Ducrey,...
DAC
2002
ACM
16 years 2 months ago
High-Level specification and automatic generation of IP interface monitors
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
Marcio T. Oliveira, Alan J. Hu
JPDC
2000
141views more  JPDC 2000»
15 years 1 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
MIDDLEWARE
2007
Springer
15 years 8 months ago
Promoting levels of openness on component-based adaptable middleware
It is widely accepted that middleware is an important architectural element which facilitates the development of software systems. In this paper we propose a novel approach for de...
Tarcisio da Rocha, Anna-Brith Arntsen, Arne Ketil ...