4887 search results - page 40 / 978 » System Level Design Using C |
120
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DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
146
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PPL
2008
15 years 2 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
105
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ISPAN
2009
IEEE
15 years 8 months ago
2009
IEEE
—In this paper, we present a design architecture of implementing a ”Vector Bank” into video encoder system, namely, an H.264 encoder, in order to detect and analyze the movin...
112
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DSD
2006
IEEE
15 years 8 months ago
2006
IEEE
Region concept helps to accommodate cores larger than the tile size in mesh topology NoC architectures. In addition, it offers many new opportunities for NoC design, as well as pr...
115
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DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
Partitioning is a time consuming and computationally complex optimization problem in the codesign of hardware software systems. The stringent time-to-market requirements have resu...