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DATE
2003
IEEE
123views Hardware» more  DATE 2003»
15 years 7 months ago
RTOS Modeling for System Level Design
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
Andreas Gerstlauer, Haobo Yu, Daniel Gajski
MTV
2005
IEEE
128views Hardware» more  MTV 2005»
15 years 7 months ago
Automated Extraction of Structural Information from SystemC-based IP for Validation
The increasing complexity and size of system level design models introduces a difficult challenge for validating them. Hence, in most industries, design validation takes a large p...
David Berner, Hiren D. Patel, Deepak Mathaikutty, ...
SDL
2003
147views Hardware» more  SDL 2003»
15 years 3 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
CODES
2003
IEEE
15 years 7 months ago
Security wrappers and power analysis for SoC technologies
Future wireless internet enabled devices will be increasingly powerful supporting many more applications including one of the most crucial, security. Although SoCs offer more resi...
Catherine H. Gebotys, Y. Zhang
ICRA
2000
IEEE
78views Robotics» more  ICRA 2000»
15 years 6 months ago
Hybrid System Design for Singularityless Task Level Robot Controllers
This paper presents a hybrid system approach in the design of a singularityless task level controller. To achieve a singularityless motion control in the neighborhood of singulari...
Jindong Tan, Ning Xi