4887 search results - page 43 / 978 » System Level Design Using C |
141
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CODES
1999
IEEE
15 years 6 months ago
1999
IEEE
We present a case study on the design of a heterogeneous architecture for MPEG-2 video decoding. The primary objective of the case study is the validation of the SPADE methodology...
224
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VLSI
2012
Springer
13 years 9 months ago
2012
Springer
e technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set sim...
ISCAS
2006
IEEE
15 years 8 months ago
2006
IEEE
Abstract— Networks-on-chip (NoCs) are a scalable interconnect solution to large scale multiprocessor systems on chip and are rapidly becoming reality. As the ratio of embedded co...
105
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DATE
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
123
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IESS
2007
Springer
15 years 8 months ago
2007
Springer
Abstract System level design is considered a major approach to tackle the complexity of modern System-on-Chip designs. Embedded software within SoCs is gaining importance as it add...