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CCECE
2006
IEEE
15 years 8 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya
72
Voted
ICC
1997
IEEE
123views Communications» more  ICC 1997»
15 years 6 months ago
Designing JPEG Quantization Matrix using Rate-Distortion Approach and Human Visual System Model
W. C. Fong, Shing-Chow Chan, Ka-Leung Ho
106
Voted
IJCNN
2006
IEEE
15 years 8 months ago
Neural Network Control of Spark Ignition Engines with High EGR Levels
— Research has shown substantial reductions in the oxides of nitrogen (NOx) concentrations by using 10% to 25% exhaust gas recirculation (EGR) in spark ignition (SI) engines [1]....
Atmika Singh, Jonathan Blake Vance, Brian C. Kaul,...
DAC
2006
ACM
15 years 8 months ago
Use of C/C++ models for architecture exploration and verification of DSPs
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
David Brier, Raj S. Mitra
110
Voted
ICCAD
2001
IEEE
256views Hardware» more  ICCAD 2001»
15 years 11 months ago
An Analytical High-Level Battery Model for Use in Energy Management of Portable Electronic Systems
Once the battery becomes fully discharged, a battery-powered portable electronic system goes off-line. Therefore, it is important to take the battery behavior into account. A syst...
Daler N. Rakhmatov, Sarma B. K. Vrudhula