4887 search results - page 550 / 978 » System Level Design Using C |
191
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TCAD
2008
15 years 6 months ago
2008
Soft-error induced reliability problems have become a major challenge in designing new generation microprocessors. Due to the on-chip caches' dominant share in die area and tr...
180
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ICCAD
2009
IEEE
15 years 4 months ago
2009
IEEE
Performance models for Network-on-Chip (NoC) are essential for design, optimization and Quality of Service (QoS) assurance. Classical queueing theory has been often used to provid...
186
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ADAEUROPE
2004
Springer
15 years 11 months ago
2004
Springer
Abstract. To handle signal processing algorithms such as the Fast Fourrier Transform (FFT) or the Discrete Cosine Transform (DCT) system designers have traditionally resorted to sp...
165
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CCR
2005
15 years 6 months ago
2005
This article describes how control theory has been used to address the question of how to size the buffers in core Internet routers. Control theory aims to predict whether the net...
167
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AICT
2006
IEEE
16 years 13 days ago
2006
IEEE
In this paper, we describe the design of a highlyavailable Grid data storage system. Increased availability is ensured by data redundancy and file striping. Redundant data is com...