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» System Level Design Using C
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DATE
2008
IEEE
119views Hardware» more  DATE 2008»
15 years 8 months ago
Guiding Circuit Level Fault-Tolerance Design with Statistical Methods
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...
Drew C. Ness, David J. Lilja
122
Voted
ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
15 years 8 months ago
Language-Based High Level Transaction Extraction on On-chip Buses
Abstract— With the increasing in silicon densities, SoC designs are the stream in modern electronics systems. Accordingly, the verification for SoC designs is crucial. One of th...
Yi-Le Huang, Chun-Yao Wang, Richard Yeh, Shih-Chie...
UML
2001
Springer
15 years 6 months ago
UML Support for Designing Software Systems as a Composition of Design Patterns
Much of the research work on design patterns has primarily focused on discovering and documenting patterns. Design patterns promise early reuse benefits at the design stage. To rea...
Sherif M. Yacoub, Hany H. Ammar
CODES
2007
IEEE
15 years 8 months ago
Combined approach to system level performance analysis of embedded systems
Compositional approaches to system-level performance analysis have shown great flexibility and scalability in the design of heterogeneous systems. These approaches often assume c...
Simon Künzli, Arne Hamann, Rolf Ernst, Lothar...
CASES
2007
ACM
15 years 6 months ago
A fast and generic hybrid simulation approach using C virtual machine
Instruction Set Simulators (ISSes) are important tools for cross-platform software development. The simulation speed is a major concern and many approaches have been proposed to i...
Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Asch...