4887 search results - page 61 / 978 » System Level Design Using C |
122
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VLSID
2002
IEEE
16 years 2 months ago
2002
IEEE
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
133
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VLSID
2008
IEEE
15 years 8 months ago
2008
IEEE
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
142
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MASCOTS
2007
2007
A Novel Flow Control Scheme for Best Effort Traffic in NoC Based on Source Rate Utility Maximization
15 years 3 months ago
—Advances in semiconductor technology, has enabled designers to put complex, massively parallel multiprocessor systems on a single chip. Network on Chip (NoC) that supports high ...
BSN
2009
IEEE
15 years 9 months ago
2009
IEEE
—A biomonitoring application running on wireless BAN has stringent timing and energy requirements. Developing such applications therefore presents unique challenges in both hardw...
ASPDAC
2005
ACM
15 years 7 months ago
2005
ACM
— With the rise in complexity of modern systems, designers are spending a significant time on at the system level of abstraction. This paper introduces Model Algebra, a formalis...