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ISSS
2002
IEEE
176views Hardware» more  ISSS 2002»
15 years 4 months ago
Controller Estimation for FPGA Target Architectures during High-Level Synthesis
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
CAD
2004
Springer
14 years 11 months ago
A shape design system using volumetric implicit PDEs
Solid modeling based on partial differential equations (PDEs) can potentially unify both geometric constraints and functional requirements within a single design framework to mode...
Haixia Du, Hong Qin
IWPC
2006
IEEE
15 years 5 months ago
A Metric-Based Heuristic Framework to Detect Object-Oriented Design Flaws
One of the important activities in re-engineering process is detecting design flaws. Such design flaws prevent an efficient maintenance, and further development of a system. Th...
Mazeiar Salehie, Shimin Li, Ladan Tahvildari
LCTRTS
2010
Springer
15 years 6 months ago
Modeling structured event streams in system level performance analysis
This paper extends the methodology of analytic real-time analysis of distributed embedded systems towards merging and extracting sub-streams based on event type information. For e...
Simon Perathoner, Tobias Rein, Lothar Thiele, Kai ...
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DSD
2010
IEEE
134views Hardware» more  DSD 2010»
14 years 11 months ago
A New High-Level Methodology for Programming FPGA-Based Smart Camera
Due to the various devices composing a smart camera system, various languages have to be known by the designer (like HDL and C/C++). Most of vision applications designers are soft...
Nicolas Roudel, François Berry, Jocelyn S&e...