This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
This paper describes a comprehensive prototype of large-scale fault adaptive embedded software developed for the proposed Fermilab BTeV high energy physics experiment. Lightweight...
Derek Messie, Mina Jung, Jae C. Oh, Shweta Shetty,...
This paper describes a new property checking approach in order to enhance the diagnosis ability of an electronic embedded system, included in an automotive application. We conside...
System optimization techniques based on dynamic voltage scaling (DVS) are widely used with the aim of reducing processor energy consumption. Inter-task DVS assigns the same voltag...
In this paper, we address the problem of multiple sequence alignment (MSA) for handling very large number of proteins sequences on mesh-based multiprocessor architectures. As the ...
Diana H. P. Low, Bharadwaj Veeravalli, David A. Ba...