468 search results - page 70 / 94 » System Level Fixed-Point Design Based on an Interpolative Ap... |
219
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EH
1999
IEEE
1999
IEEE
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
15 years 6 months ago
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
108
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DATE
2010
IEEE
15 years 7 months ago
2010
IEEE
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
133
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ASAP
2005
IEEE
15 years 7 months ago
2005
IEEE
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
143
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ASPLOS
2012
ACM
13 years 9 months ago
2012
ACM
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
120
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WADT
1998
Springer
15 years 5 months ago
1998
Springer
Graph transformation systems have been introduced for the formal specification of software systems. States are thereby modeled as graphs, and computations as graph derivations acco...