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FPL
2004
Springer
114views Hardware» more  FPL 2004»
15 years 10 months ago
Artificial Neural Networks Processor - A Hardware Implementation Using a FPGA
Several implementations of Artificial Neural Networks have been reported in scientific papers. Nevertheless, these implementations do not allow the direct use of off-line trained n...
Pedro Ferreira, Pedro Ribeiro, Ana Antunes, Fernan...
142
Voted
ICECCS
2000
IEEE
126views Hardware» more  ICECCS 2000»
15 years 9 months ago
Domain Modeling of Software Process Models
This paper presents a novel application involving two important Software Engineering research areas: process modeling and software reuse. The Spiral Model is a risk-driven process...
Hassan Gomaa, Larry Kerschberg, Ghulam A. Farrukh
RTCSA
2007
IEEE
15 years 11 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
142
Voted
DNA
2007
Springer
106views Bioinformatics» more  DNA 2007»
15 years 9 months ago
Hardware Acceleration for Thermodynamic Constrained DNA Code Generation
Reliable DNA computing requires a large pool of oligonucleotides that do not produce cross-hybridize. In this paper, we present a transformed algorithm to calculate the maximum wei...
Qinru Qiu, Prakash Mukre, Morgan Bishop, Daniel J....
140
Voted
ICMCS
2006
IEEE
117views Multimedia» more  ICMCS 2006»
15 years 11 months ago
Data Hiding for Speech Bandwidth Extension and its Hardware Implementation
Most of the current speech transmission systems are only able to deliver speech signals in a narrow frequency band. This narrowband speech is characterized by a thin and muffled ...
Fan Wu, Siyue Chen, Henry Leung