12333 search results - page 2114 / 2467 » System Level Modelling for Hardware Software Systems |
141
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ASPDAC
2006
ACM
16 years 6 days ago
2006
ACM
- Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact...
142
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ISCAS
2005
IEEE
15 years 11 months ago
2005
IEEE
Abstract — Mapping applications onto different networks-onchip (NoCs) topologies is done by mapping processing cores on local ports of routers considering requirements like laten...
154
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AAAI
2000
15 years 7 months ago
2000
The inherent difficulty in supporting human usability in large control systems--such as building environmental and security systems--derives from the large diversity of components...
180
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HPCA
2011
IEEE
14 years 10 months ago
2011
IEEE
Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suff...
184
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EUROPAR
2011
Springer
14 years 6 months ago
2011
Springer
: Tuning numerical libraries has become more difficult over time, as systems get more sophisticated. In particular, modern multicore machines make the behaviour of algorithms hard ...