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DATE
2009
IEEE
90views Hardware» more  DATE 2009»
15 years 11 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
SAT
2009
Springer
91views Hardware» more  SAT 2009»
15 years 11 months ago
VARSAT: Integrating Novel Probabilistic Inference Techniques with DPLL Search
Probabilistic inference techniques can be used to estimate variable bias, or the proportion of solutions to a given SAT problem that fix a variable positively or negatively. Metho...
Eric I. Hsu, Sheila A. McIlraith
DSD
2006
IEEE
113views Hardware» more  DSD 2006»
15 years 11 months ago
Lifetime Analysis in Heterogeneous Sensor Networks
Wireless sensor networks (WSN) are composed of battery-driven communication entities performing multiple, usually different tasks. In order to complete a given task, all sensor no...
Falko Dressler, Isabel Dietrich
170
Voted
ISPD
2005
ACM
239views Hardware» more  ISPD 2005»
15 years 10 months ago
Mapping algorithm for large-scale field programmable analog array
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson...
ATS
2003
IEEE
75views Hardware» more  ATS 2003»
15 years 10 months ago
An Enhanced Test Generator for Capacitance Induced Crosstalk Delay Faults
Capacitive crosstalk can give rise to slowdown of signals that can propagate to a circuit output and create a functional error. A test generation methodology, called XGEN, was dev...
Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer
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