Sciweavers

12333 search results - page 2166 / 2467
» System Level Modelling for Hardware Software Systems
Sort
View
ISPASS
2007
IEEE
15 years 11 months ago
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad ...
CODES
2005
IEEE
15 years 10 months ago
Blue matter on blue gene/L: massively parallel computation for biomolecular simulation
This paper provides an overview of the Blue Matter application development effort within the Blue Gene project that supports our scientific simulation efforts in the areas of pro...
Robert S. Germain, Blake G. Fitch, Aleksandr Raysh...
CGO
2004
IEEE
15 years 8 months ago
Custom Data Layout for Memory Parallelism
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
Byoungro So, Mary W. Hall, Heidi E. Ziegler
PLDI
2010
ACM
16 years 2 months ago
Pacer: Proportional Detection of Data Races
Data races indicate serious concurrency bugs such as order, atomicity, and sequential consistency violations. Races are difficult to find and fix, often manifesting only in deploy...
Michael D. Bond, Katherine E. Coons, Kathryn S. Mc...
VEE
2009
ACM
146views Virtualization» more  VEE 2009»
15 years 11 months ago
Demystifying magic: high-level low-level programming
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
Daniel Frampton, Stephen M. Blackburn, Perry Cheng...
« Prev « First page 2166 / 2467 Last » Next »