12333 search results - page 2167 / 2467 » System Level Modelling for Hardware Software Systems |
167
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HIPEAC
2009
Springer
15 years 11 months ago
2009
Springer
Abstract. Iterative compilation is an efficient approach to optimize programs on rapidly evolving hardware, but it is still only scarcely used in practice due to a necessity to gat...
170
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LCTRTS
2007
Springer
15 years 11 months ago
2007
Springer
As mobile phones become increasingly multifunctional, the number and size of applications installed in phones are rapidly increasing. Consequently, mobile phones require more hard...
161
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CODES
2005
IEEE
15 years 10 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
195
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CODES
2003
IEEE
15 years 10 months ago
2003
IEEE
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
154
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CASES
2007
ACM
15 years 9 months ago
2007
ACM
ABSTRACT This paper presents the first scratch-pad memory allocation scheme that requires no compiler support for interpreted-language based applications. A scratch-pad memory (SPM...