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ISCAS
2006
IEEE
160views Hardware» more  ISCAS 2006»
15 years 10 months ago
Address-event image sensor network
We describe a sensor network based on smart requirements of the network. This will provide a new approach imager sensors able to extract events of interest from a scene. for compos...
Eugenio Culurciello, Andreas Savvides
MTDT
2003
IEEE
100views Hardware» more  MTDT 2003»
15 years 9 months ago
Optimal Spare Utilization in Repairable and Reliable Memory Cores
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-...
IPPS
2010
IEEE
15 years 2 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
163
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TPDS
2010
109views more  TPDS 2010»
14 years 11 months ago
Incentivized Peer-Assisted Streaming for On-Demand Services
As an efficient distribution mechanism, Peer-to-Peer (P2P) technology has become a tremendously attractive solution to offload servers in large-scale video streaming applications. ...
Chao Liang, Zhenghua Fu, Yong Liu, Chai Wah Wu
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 9 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāˆ’specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
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