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» System Level Modelling for Hardware Software Systems
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143
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CODES
2009
IEEE
15 years 6 months ago
Building heterogeneous reconfigurable systems with a hardware microkernel
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a softwarelike ...
Jason Agron, David L. Andrews
116
Voted
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
16 years 3 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
CODES
2007
IEEE
15 years 9 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele
75
Voted
DATE
2009
IEEE
89views Hardware» more  DATE 2009»
15 years 9 months ago
OSSS+R: A framework for application level modelling and synthesis of reconfigurable systems
Andreas Schallenberg, Wolfgang Nebel, Andreas Herr...
IRI
2007
IEEE
15 years 9 months ago
Reuse Technique in Hardware Design
The paper presents a technique for the design of digital systems on the basis of reusable hardware templates, which are circuits with modifiable functionality that might be custom...
Valery Sklyarov, Iouliia Skliarova