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FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
15 years 7 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
125
Voted
INFFUS
2007
107views more  INFFUS 2007»
15 years 1 months ago
An information fusion demonstrator for tactical intelligence processing in network-based defense
The Swedish Defence Research Agency (FOI) has developed a concept demonstrator called the Information Fusion Demonstrator 2003 (IFD03) for demonstrating information fusion methodo...
Simon Ahlberg, Pontus Hörling, Katarina Johan...
150
Voted
EUROCAST
1997
Springer
156views Hardware» more  EUROCAST 1997»
15 years 5 months ago
A Computational Model for Visual Size, Location and Movement
The ability to detect object size, location and movement is essential for a visual system in either a biological or man made environment. In this paper we present a model for esti...
Miguel Alemán-Flores, K. Nicholas Leibovic,...
SAC
2004
ACM
15 years 6 months ago
Combining analysis and synthesis in a model of a biological cell
for ideas, and then abstract away from these ideas to produce algorithmic processes that can create problem solutions in a bottom-up manner. We have previously described a top-dow...
Ken Webb, Tony White
154
Voted
RTAS
1997
IEEE
15 years 5 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford