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PADS
2003
ACM
15 years 8 months ago
DVS: An Object-Oriented Framework for Distributed Verilog Simulation
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
Lijun Li, Hai Huang, Carl Tropper
MICRO
2002
IEEE
171views Hardware» more  MICRO 2002»
15 years 8 months ago
Orion: a power-performance simulator for interconnection networks
With the prevalence of server blades and systems-ona-chip (SoCs), interconnection networks are becoming an important part of the microprocessor landscape. However, there is limite...
Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh, Sharad...
WORM
2003
15 years 4 months ago
Experiences with worm propagation simulations
Fast Internet worms are a relatively new threat to Internet infrastructure and hosts. We discuss motivation and possibilities to study the behaviour of such worms and degrees of f...
Arno Wagner, Thomas Dübendorfer, Bernhard Pla...
ASPDAC
1995
ACM
111views Hardware» more  ASPDAC 1995»
15 years 7 months ago
A hardware-software co-simulator for embedded system design and debugging
One of the interesting problems in hardware-software co-design is that of debugging embedded software in conjunction with hardware. Currently, most software designers wait until a...
A. Ghosh, M. Bershteyn, R. Casley, C. Chien, A. Ja...
HPCNCS
2007
15 years 4 months ago
Time-Adaptive Numerical Simulation for High Speed Networks
Abstract—As the bandwidth of networks is increasing exponentially, the computational cost to simulate such type of networks is also growing in a similar fashion. This paper prese...
Suman Kumar, Seung-Jong Park, S. Sitharama Iyengar...