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» System level design, a VHDL based approach
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DSD
2008
IEEE
79views Hardware» more  DSD 2008»
15 years 4 months ago
Digital Systems Architectures Based on On-line Checkers
In this paper, a methodology for generating VHDL descriptions of hardware checkers is presented. It is shown how the methodology can be used to generate on-line checkers of commun...
Martin Straka, Zdenek Kotásek, Jan Winter
DATE
1998
IEEE
107views Hardware» more  DATE 1998»
15 years 1 months ago
A Flexible Message Passing Mechanism for Objective VHDL
When defining an object-oriented extension to VHDL, the necessary message passing is one of the most complex issues and has a large impact on the whole language. This paper identi...
Wolfram Putzke-Röming, Martin Radetzki, Wolfg...
99
Voted
FPL
2006
Springer
223views Hardware» more  FPL 2006»
15 years 1 months ago
From Equation to VHDL: Using Rewriting Logic for Automated Function Generation
This paper presents a novel tool flow combining rewriting logic with hardware synthesis. It enables the automated generation of synthesizable VHDL code from mathematical equations...
Carlos Morra, M. Sackmann, Sunil Shukla, Jürg...
EUROMICRO
2000
IEEE
15 years 1 months ago
Concurrent Control Systems: From Grafcet to VHDL
The Automated Production Systems (APS) are composed of concurrent interacting entities. Then any model should exhibit parallel and sequential behaviours. The Grafcet is now well e...
Frédéric Mallet, Daniel Gaffé...
FPGA
2004
ACM
180views FPGA» more  FPGA 2004»
15 years 2 months ago
A VHDL MPEG-7 shape descriptor extractor
Unlike its predecessors, MPEG-7 standardizes multimedia metadata description. By providing robust descriptors and an effective system for storing them, MPEG-7 is designed to provi...
Bret Woz, Andreas E. Savakis