169 search results - page 19 / 34 » System level memory optimization for hardware-software co-de... |
157
Voted
CASES
2005
ACM
15 years 5 months ago
2005
ACM
The lack of virtual memory protection is a serious source of unreliability in many embedded systems. Without the segment-level protection it provides, these systems are subject to...
141
Voted
CODES
2008
IEEE
15 years 10 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
136
click to vote
EDBT
2008
ACM
16 years 3 months ago
2008
ACM
Modern enterprise data warehouses have complex workloads that are notoriously difficult to manage. An important problem in workload management is to run these complex workloads `o...
127
Voted
ICS
2009
Tsinghua U.
15 years 10 months ago
2009
Tsinghua U.
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...
181
Voted
IPPS
1995
IEEE
15 years 7 months ago
1995
IEEE
This paper describes improvements to the Mach microkernel’s support for efficient application startup across multiple nodes in a cluster or massively parallel processor. Signifi...