Naval Surface Warfare Center Dahlgren Division; under joint sponsorship of the Office of Naval Research; the Naval Command, Control, and Ocean Surveillance Center; and the Naval S...
Most Hardware Transactional Memory (HTM) implementations choose fixed version and conflict management policies at design time. While eager HTM systems store transactional state in-...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...
Cost pressure is driving vendors of safety-critical systems to integrate previously distributed systems. One natural approach we have previous introduced is On-Demand Redundancy (...
Brett H. Meyer, Benton H. Calhoun, John Lach, Kevi...
Data intensive applications in Life Sciences extensively use the Hidden Web as a platform for information sharing. Access to these heterogeneous Hidden Web resources is limited thr...
Anupam Bhattacharjee, Aminul Islam, Mohammad Shafk...
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...