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ICPPW
2009
IEEE
16 years 1 months ago
Multiprocessor Synchronization and Hierarchical Scheduling
Multi-core architectures have received significant interest as thermal and power consumption problems limit further increase of speed in single-cores. In the multi-core research ...
Farhang Nemati, Moris Behnam, Thomas Nolte
MICRO
2008
IEEE
124views Hardware» more  MICRO 2008»
16 years 22 days ago
Token tenure: PATCHing token counting using directory-based cache coherence
Traditional coherence protocols present a set of difficult tradeoffs: the reliance of snoopy protocols on broadcast and ordered interconnects limits their scalability, while dire...
Arun Raghavan, Colin Blundell, Milo M. K. Martin
SIGMETRICS
2006
ACM
128views Hardware» more  SIGMETRICS 2006»
16 years 8 days ago
GPS scheduling: selection of optimal weights and comparison with strict priorities
We consider a system with two service classes with heterogeneous traffic characteristics and Quality-of-Service requirements. The available bandwidth is shared between the two tra...
Pascal Lieshout, Michel Mandjes, Sem C. Borst
SIGARCH
2008
97views more  SIGARCH 2008»
15 years 6 months ago
SP-NUCA: a cost effective dynamic non-uniform cache architecture
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...
PUC
2007
154views more  PUC 2007»
15 years 5 months ago
Point-of-capture archiving and editing of personal experiences from a mobile device
Personal experience computing is an emerging research area in computing support for capturing, archiving, editing, and utilizing of digital personal experiences. This paper presen...
Chon-in Wu, Chao-ming Teng, Yi-Chao Chen, Tung-yun...